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March 29, 2010 Datasheet No - PD97477
IRS2573D
HID BALLAST CONTROL IC
Datasehet
Features
* * * * * * * * * * * * * * * * * * * * * Buck, full-bridge and lamp control in one IC Continuous/critical-conduction mode buck control 600V high and low-side full-bridge driver 600V high-side buck Driver Low-side ignition FET gate driver Integrated bootstrap FETs for full-bridge high-side drivers Constant lamp power control Programmable buck cycle-by-cycle over-current protection Programmable buck output voltage limitation Programmable lamp current limitation Programmable full-bridge frequency Fault latch reset input Programmable ignition counter (21sec/64sec typical) Programmable lamp under-voltage fault counter
(197sec typical) for short-circuit or lamp does not warm-up
Product Summary
Topology VOFFSET VOUT IO+, IO-, IO-Buck (typical) Deadtime (typical) Duty Cycle Full-Bridge & Buck 600 V VCC 180mA, 260mA, 400mA 1.2 s 50% 1%
Package Options
Fast transient lamp under-voltage event counter
(16384 typical) for arc instability or end-of-life
Programmable lamp over-voltage fault counter
(787sec typical) for open-circuit or lamp extinguishes
Programmable good fault reset counter (2730sec typical) Micro-controller compatible timing thresholds Internal 15.6V zener clamp diode on VCC Micropower startup (150A) Latch immunity and ESD protection on all pins
SOIC28W
Typical Application Diagram
BUS (+) 400VDC MBUCK RCS LBUCK CBUCK RB DBUCK RVSENSE1
RBB1 R1 RBB2 CBUS RBB3 CCS CS VB1
RVSENSE2
1
BUCK
28
HO1
CBS1
RDHO1 DHO1 RVSENSE3 MHS1 RHO1 TIGN LAMP RLO1 MLS1 MLS2 MHS2
DHO2 RDHO2
2
VSB DBS RDB DBB (+) 14VDC (-) RZX CVCC2 CBB VBB
27
VS1
RHO2
3
26
LO1
RLO2
4
VCC CVCC1 COM
25
LO2 RDLO1
5 6
24
VB2
DLO1 DLO2 RDLO2
IRS2573D
23
HO2
ZX
CBS2
7
CTOFF TOFF
22
VS2
8
CICOMP ICOMP
21
IGN
9
CPCOMP PCOMP
20
OV COV ROV COV ROC RISENSE CISENSE MIGN RVSENSE RS RIGN
DIGN
10
RIREF CT IREF
19
OC
11
CT
18
ISENSE
12
CTIGN TIGN
17 16 15
VSENSE
13
CTCLK TCLK
14
CVSENSE RST
CIGN
BUS (-)
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IRS2573D
Table of Contents
Typical Application Diagram Qualification Information Absolute Maximum Ratings Recommended Operating Conditions Electrical Characteristics Functional Block Diagram Input / output Pin Equivalent Circuit Diagram Lead Definitions Lead Assignments State Diagram Application Information and Additional Details Parameter Temperature Trends Package Details Package Details, Tape and Reel Part Marking Information Ordering Information
Page
1 4 5 6 7 10 11 12 13 14 15 23 25 26 27 28
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Description
The IRS2573D is a fully-integrated, fully-protected 600V HID control IC designed to drive all types of HID lamps. Internal circuitry provides control for ignition, warm-up, running and fault operating modes. The IRS2573D features include ignition timing control, constant lamp power control, programmable full-bridge running frequency, programmable over and under-voltage protection and programmable over-current protection. Advanced protection features such as failure of a lamp to ignite, open load, short-circuit and a programmable fault counter have also been included in the design.
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Qualification Information
Qualification Level Industrial Comments: This family of ICs has passed JEDEC's Industrial qualification. IR's Consumer qualification level is granted by extension of the higher Industrial level. MSL3 260C SOIC28W (per IPC/JEDEC J-STD-020) Class B (per JEDEC standard JESD22-A115) Class 2 (per EIA/JEDEC standard EIA/JESD22-A114) Class I, Level A (per JESD78) Yes
Moisture Sensitivity Level Machine Model ESD Human Body Model IC Latch-Up Test RoHS Compliant
Qualification standards can be found at International Rectifier's web site http://www.irf.com/ Higher qualification ratings may be available should the user have such requirements. Please contact your International Rectifier sales representative for further information. Higher MSL ratings may be available for the specific package types listed here. Please contact your International Rectifier sales representative for further information.
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Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM, all currents are defined positive into any lead. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Symbol VB1 VB2 VBB VS1 VS2 VSB VHO1 VHO2 VBUCK VLO1 VLO2 VIGN VCS VCT VTIGN VTCLK VRST VVSENSE VISENSE VOC VOV IOMAX IBB ICS IICOMP IPCOMP IZX ITOFF ICC IIREF dVS/dt PD RJA TJ TS TL Definition High-Side Floating Supply Voltage High-Side Floating Supply Voltage High-Side Floating Supply Voltage High-Side Floating Supply Offset Voltage High-Side Floating Supply Offset Voltage High-Side Floating Supply Offset Voltage High-Side Floating Output Voltage High-Side Floating Output Voltage High-Side Floating Output Voltage Low-Side Output Voltage Low-Side Output Voltage Low-Side Output Voltage Buck Current Sense Pin Voltage Full-Bridge Oscillator Timing Pin Voltage Ignition Timer Pin Voltage Fault Timer Pin Voltage Reset Pin Voltage Lamp Voltage Sense Pin Voltage Lamp Current Sense Pin Voltage Current Limitation Pin Voltage Voltage Limitation Pin Voltage Maximum allowable output current (HO1, HO2, BUCK, LO1, LO2, IGN) due to external power transistor miller effect Buck High-side Supply Current Buck Current Sense Pin Current Buck Compensation Pin Current Buck Compensation Pin Current Buck Zero-crossing Detection Pin Current Buck Off-time Pin Current Supply current Current Reference Pin Current Allowable offset voltage slew rate Package power dissipation @ TA +25 SOIC28W C Thermal resistance, junction to ambient SOIC28W Junction temperature Storage temperature Lead temperature (soldering, 10 seconds) Min. -0.3 -0.3 -0.3 VB1 - 25 VB2 - 25 VBB - 20 VS1 - 0.3 VS2 - 0.3 VSB - 0.3 -0.3 -0.3 -0.3 VSB - 0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -500 -20 -5 -5 -5 -5 -5 -20 -5 -50 -----55 -55 --Max. 625 625 625 VB1 + 0.3 VB2 + 0.3 VBB + 0.3 VB1 + 0.3 VB2 + 0.3 VBB + 0.3 VCC + 0.3 VCC + 0.3 VCC + 0.3 VBB + 0.3 VCC + 0.3 VCC + 0.3 VCC + 0.3 VCC + 0.3 VCC + 0.3 VCC + 0.3 VCC + 0.3 VCC + 0.3 500 20 5 5 5 5 5 20 5 50 1.6 78 150 150 300 Units
V
mA
V/ns W C/W C
This IC contains a voltage clamp structure between the chip VCC and COM which has a nominal breakdown voltage of 15.6 V. Please note that this supply pin should not be driven by a DC, low impedance power source greater than the VCLAMP specified in the Electrical Characteristics section.
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Recommended Operating Conditions
For proper operation the device should be used within the recommended conditions. Symbol VB1-VS1 VB2-VS2 VBB-VSB VS1,VS2,VS B VCC ICC IBB ICS IZX CTOFF CT CTIGN CTCLK RIREF VRST VVSENSE VISENSE VOC VOV TJ Definition High Side Floating Supply Voltage High Side Floating Supply Voltage High Side Floating Supply Voltage Steady State High-side Floating Supply Offset Voltage Supply Voltage VCC Supply Current VBB Supply Current Buck Current Sensing Pin Current Buck Zero-crossing Sensing Pin Current Buck Off-time Pin Capacitor Full-bridge Oscillator Timing Pin Capacitor Ignition Timer Pin Capacitor Fault Counter Pin Capacitor Current Reference Pin Resistor Reset Pin Voltage Voltage Sense Pin Voltage Current Sense Pin Voltage Current Limitation Pin Voltage Voltage Limitation Pin Voltage Junction Temperature Min. VB1UV+ VB2UV+ VBBUV+ -1
Max. VCLAMP1 VCLAMP1 VCLAMP1 600 VCLAMP1 10 10 1 1 ----------VCC VCC VCC VCC VCC 125
Units
V
VCCUV+ -1 -1 470 10 10 10 10 0 0 0 0 0 -40
mA pF nF kOhm
V
C
Care should be taken to avoid output switching conditions where the VS node flies inductively below ground by more than 5 V. Enough current should be supplied to the VCC pin to keep the internal 15.6 V zener diode clamping the voltage at this pin. Enough current should be supplied to the VBB pin to maintain a VBBSB voltage magnitude of VCLAMP1.
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Electrical Characteristics
VCC = VB1S1 = VB2S2 = VBBSB = VBIAS = 14V +/- 0.25V, CLO1 = CLO2 = CIGN = CHO1 = CHO2 = BUCK = 1000pF, RIREF = 20kOhm, ROC = 10kOhm, ROV = 50kOhm, VRST = COM, CS = VSB, CT = TIGN = TCLK = VSENSE = ISENSE = PCOMP = ICOMP = ZX = TOFF = COM, TA = 25C unless otherwise specified. Symbol Definition Min Typ Max Units Test Conditions Supply Characteristics VCC Supply Undervoltage Positive Going VCC rising from 0V VCCUV+ 9.5 10.5 11.5 Threshold VCC Supply Undervoltage Negative V VCC falling from 14V VCCUV8.5 9.5 10.5 Going Threshold VUVHYS IQCCUV IQCCFLT IQCC ICCGM VCLAMP1
VCC Supply Undervoltage Lockout Hysteresis
0.5 --------14.6 ----8.0 7.0 ------8.0 7.0 --19.8 ----8.0 7.0 --1.03 50
1.0 150 420 3.5 5.0 15.6 50 80 9.0 8.0 --50 80 9.0 8.0 --20.8 360 1 9.0 8.0 --1.18 120
1.5 A ----16.6 ----10.0 V 9.0 50 ----10.0 V 9.0 50 21.8 --10.0 V 9.0 50 1.33 190 A V ns A V A mA
VB2S2 falling from 14V VB1S1 falling from 14V
UVLO Mode VCC Quiescent Current Fault Mode VCC Quiescent Current Quiescent VCC Supply Current General Mode VCC Supply Current
VCC = 9V
mA
VICOMP = VPCOMP = 4V, CTOFF=1nF, CT=47nF, CTIGN=1uF, CTCLK=0.12uF, VSENSE=0.8V
VCC Zener Clamp Voltage Full-Bridge Floating Supply Characteristics IQB1S1_0 Quiescent VBS Supply Current IQB1S1_1 VB1S1UV+ Quiescent VBS Supply Current VB1S1 Supply Undervoltage Positive Going Threshold VB1S1 Supply Undervoltage Negative VB1S1UVGoing Threshold ILKVS1 VS1 Offset Supply Leakage Current IQB2S2_0 Quiescent VBS Supply Current IQB2S2_1 Quiescent VBS Supply Current V Supply Undervoltage Positive VB2S2UV+ B2S2 Going Threshold VB2S2 Supply Undervoltage Negative VB2S2UVGoing Threshold ILKVS2 VS2 Offset Supply Leakage Current Buck Floating Supply Characteristics VCLAMP2 VBB Zener Clamp Voltage IQBBSB_0 Quiescent VBBSB Supply Current IBBSB VBBSB Supply Current VBBSB Supply Undervoltage Positive VBBSBUV+ Going Threshold VBBSB Supply Undervoltage Negative VBBSBUVGoing Threshold ILKVSB VSB Offset Supply Leakage Current VCS CS pin over-current threshold tBLANK CS pin current-sensing blank time
V
ICC = 10mA VHO1 = VS1 VHO1 = VB1
VB1S1 rising from 0V
A
A
VB1 = VS1 = 600V VHO2 = VS2 VHO2 = VB2
VB2S2 rising from 0V
VB2 = VS2 = 600V IBB = 10mA VBUCK = VSB
VICOMP = VPCOMP = 4V, CTOFF = 1nF VBBSB rising from 0V VICOMP = VPCOMP = 0.5V VBBSB falling from 14V VICOMP = VPCOMP = 0.5V
VBB = VSB = 600V
VICOMP = VPCOMP = 4V
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Electrical Characteristics
VCC = VB1S1 = VB2S2 = VBBSB = VBIAS = 14V +/- 0.25V, CLO1 = CLO2 = CIGN = CHO1 = CHO2 = BUCK = 1000pF, RIREF = 20kOhm, ROC = 10kOhm, ROV = 50kOhm, VRST = COM, CS = VSB, CT = TIGN = TCLK = VSENSE = ISENSE = PCOMP = ICOMP = ZX = TOFF = COM, TA = 25C unless otherwise specified. Symbol Definition Min Typ Max Units Test Conditions Buck Control Characteristics VPCOMP=7V IPCOMP OTA1 Error Amplifier Output Current VVSENSE = VISENSE = 28 40 52 SOURCE Sourcing VVSENSE PCOMP=0uA - 0.3V IPCOMP OTA1 Error Amplifier Output Current Sinking SINK IICOMP OTA2 Error Amplifier Output Current SOURCE Sourcing IICOMP OTA2 Error Amplifier Output Current Sinking SINK OTA1,2 Error Amplifier Output Voltage VCOMPOH Swing (high state) KMULT PSENSE Internal Multiplier Gain KMULT = VIREF/ ( 2x VVSENSE x VISENSE ) VVSENSE x VISENSE 28 28 28 ----0.465 ------------91 1.93 160 49 0.8 0.8 --------18 57 --------40 40 40 12.5 2.0 0.50 0.2 0.2 0.5 2.0 400 6.5 110 2.05 200 50 1.2 1.2 4.0 2.0 80 80 21 64 4.0 2.0 6 6 52 uA 52 52 ----0.535 ------------129 2.17 240 51 1.5 1.5 ------uA --24 71 ------uA --VTIGN = 4.5V
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VPCOMP=7V VVSENSE = VISENSE = VVSENSEPCOMP=0uA + 0.3V VICOMP=7V VISENSE = VISENSEICOMP=0uA - 0.5V VICOMP=7V VISENSE = VISENSEICOMP=0uA + 0.5V
IPCOMP = IPCOMP_SOURCE - 10uA, or IICOMP = IICOMP_SOURCE - 10uA
V
VVSENSE = VVSENSE(PCOMP = 0uA), VISENSE = 500mV VVSENSE = 1V VISENSE = 500mV
VPCOMPTH PCOMP pin buck on/off threshold voltage
VICOMPTH- ICOMP pin buck off threshold voltage VICOMPTH+ ICOMP pin buck on threshold voltage
V mV V uA V Hz % us V
VICOMP = 2V VPCOMP = 2V VPCOMP = 2V
VPCOMP = VICOMP = 7V VPCOMP = VICOMP = 7V
VZX ZX pin Comparator Threshold Voltage VZXhys ZX pin Comparator Hysteresis VZXclamp ZX pin Clamp Voltage (high state) ITOFF TOFF pin Output Current VTOFF TOFF pin Comparator Threshold Voltage Full-Bridge Oscillator Characteristics fOSC Full-Bridge oscillator frequency d Oscillator duty cycle tdLO1,2 LO1, LO2 output deadtime tdHO1,2 HO1, HO2 output deadtime VCT+ CT pin upper threshold voltage VCTCT pin lower threshold voltage ICT CT pin sourcing current SOURCE ICT CT pin sinking current SINK Ignition Timer Characteristics TIGNON IGN pin on-time TIGNOFF IGN pin off-time VTIGN+ TIGN pin upper threshold voltage VTIGNTIGN pin lower threshold voltage ITIGN TIGN pin sourcing current SOURCE ITIGN TIGN pin sinking current SINK
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IZX = 5mA VBUCK = VSB
VPCOMP = VICOMP = 7V CTOFF = 1nF
CCT = 47nF
VCT = 1.5V VCT = 4.5V CTIGN = 1uF MODE = IGN
sec V
VTIGN = 1.5V
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Electrical Characteristics
VCC = VB1S1 = VB2S2 = VBBSB = VBIAS = 14V +/- 0.25V, CLO1 = CLO2 = CIGN = CHO1 = CHO2 = BUCK = 1000pF, RIREF = 20kOhm, ROC = 10kOhm, ROV = 50kOhm, VRST = COM, CS = VSB, CT = TIGN = TCLK = VSENSE = ISENSE = PCOMP = ICOMP = ZX = TOFF = COM, TA = 25C unless otherwise specified. Symbol Definition Min Typ Max Units Test Conditions Fault Counter Characteristics TCLK CTCLK = 0.12uF CLK pin oscillation period --12.0 --ms VTCLK+ TCLK pin upper threshold voltage --4.0 --V VTCLKTCLK pin lower threshold voltage --2.0 --ITCLK VTCLK = 1.5V TCLK pin sourcing current --40 --SOURCE uA ITCLK VTCLK = 4.5V TCLK pin sinking current --40 --SINK CTIGN = 1uF, tGOOD GOOD COUNTER time --2850 --VVSENSE = 0.8V CTCLK = 0.12uF, VSENSE pin under-voltage fault counter sec tUVFAULT 187 197 207 VVSENSE < VOV(1/7.5) time CTCLK = 0.12uF, VSENSE pin over-voltage fault counter tOVFAULT 737 787 837 VVSENSE > VOV(2/5) time nEVENTS VSENSE pin fast transient under-voltage fault events --16384
--V V
VVSENSE = pulses (ton=10us, toff=5us, ampl.= 0.8V to COM)
VRST+ RST pin rising threshold voltage ----2.5 VRSTRST pin falling threshold voltage 1.5 ----Reference Current Characteristics VIREF IREF pin reference voltage 1.95 2.00 2.05 Voltage Sensing Characteristics VSENSE pin buck voltage limitation VOV 2.3 2.55 2.8 threshold VOV(2/5) VSENSE pin over-voltage threshold 0.92 1.05 1.18 VOV(1/7.5) VSENSE pin under-voltage threshold 0.298 0.35 0.403 Current Limitation Characteristics VISENSE ISENSE pin current limitation threshold 460 520 580 Gate Driver Output Characteristics (HO1, HO2, LO1, LO2, BUCK, IGN pins) VOL Low-Level output voltage --COM --VOH High-Level output voltage --VCC --Tr Turn-On rise time --120 220 Tf Turn-Off fall time --50 100 HO1, HO2, LO1, LO2, IGN Source --180 --IO+ Current IOHO1, HO2, LO1, LO2, IGN Sink Current --260 --IO+ BUCK Source Current --180 --IOBUCK Sink Current --400 --Bootstrap MOSFET Characteristics (VB1, VB2 pins) VB_ON VB voltage when BS FET is on 13.0 13.7 --IB_CAP VB source current when BS FET is on --55 --IB_10V VB source current when BS FET is on --12 ---
MODE = FAULT MODE = UVLO RIREF = 20kOhm
V
ROV = 50kOhm
mV V ns
ROC = 10kOhm IO = 0
mA
VICOMP = VPCOMP = 10V
V mA VBS=0V VVB = 10V CT = 0V, CT = 6V
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Functional Block Diagram
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Input/Output Pin Equivalent Circuit Diagrams: IRS2573D
VB1, VB2 ESD Diode HO1, HO2 ESD Diode VS1, VS2 600V VSB VCC ESD Diode LO1, LO2, IGN ESD Diode 25V COM 600V VCC 25V 25V VBB ESD Diode BUCK ESD Diode 25V
COM
VCC ESD Diode IREF RESD ESD Diode
VCC ESD Diode RESD OC, OV ESD Diode
RESD
COM COM
VCC ESD Diode TOFF ESD Diode RESD RESD
COM
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Lead Definitions
Symbol CS BUCK VSB VBB VCC COM ZX TOFF ICOMP PCOMP IREF CT TIGN TCLK RST VSENSE ISENSE OV OV IGN VS2 HO2 VB2 LO2 LO1 VS1 HO1 VB1 Description Buck Current-sensing Input Buck High-side Floating Gate Driver Output Buck High-side Floating Return Buck High-side Floating Gate Driver Supply Voltage IC Supply Voltage IC Power and Signal Ground Buck Zero-Crossing Detection Input Buck Off-time Programming Capacitor Buck On-time Current Limit Compensation Capacitor Buck On-time Constant Power Compensation Capacitor Current Reference Programming Resistor Full-Bridge Oscillator Timing Capacitor Ignition Timer Programming Capacitor Fault Timer Programming Capacitor Fault Reset Input Lamp Voltage Sensing Input Lamp Current Sensing Input ISENSE Over-current Threshold Programming Resistor VSENSE Over-voltage Threshold Programming Resistor Igniter Low-side Gate Driver Output Full-Bridge High-side Floating Return Full-Bridge High-side Floating Gate Driver Output Full-Bridge High-side Floating Gate Driver Supply Voltage Full-Bridge Low-side Gate Driver Output Full-Bridge Low-side Gate Driver Output Full-Bridge High-side Floating Return Full-Bridge High-side Floating Gate Driver Output Full-Bridge High-side Floating Gate Driver Supply Voltage
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Lead Assignments
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State Diagram Power Turned On
FAULT Mode
Fault Latch Set Full-Bridge Off (CT=0V) Buck Off IGN Timer Off (TIGN=0V) CLK Off (TCLK=0V) IQCC 350 A VCC = 15.6V All Counters Reset VCC < UVLO(Power Off) or RST > VRST+ (Fault Reset)
UVLO Mode
Full-Bridge Off (CT=0V) Buck Off (ICOMP, PCOMP, TOFF=0V) IGN Timer Off (TIGN=0V) CLK Off (TCLK=0V) IQCC 150 A Fault and Good Counters Reset Fault Latch Reset VCC > UVLO+ and VSENSE > VOV and RST < VRST-
VCC < UVLO(VCC Fault or Power Down)
IGN Mode
VSENSE > VOV(2/5) for 787sec (open circuit) IGN (21s 'HIGH'/64s 'LOW') Ignition Counter Enabled Buck and Full-Bridge Enabled CLK and Fault Counters Enabled Good Counter Reset VSENSE OVP Enabled VSENSE < VOV(2/5)
VOV(2/5) < VSENSE < VOV and PCOMP > 0.2V and ICOMP > 0.5V
VSENSE > VOV(2/5)
VSENSE < VOV(1/7.5) for 197sec (short circuit or does not warm up) or VSENSE < VOV(1/7.5) for 16384 Events
GENERAL Mode
Full-Bridge Oscillating @ fBRIDGE Buck Enabled IGN 'LOW' CLK and Fault Counters Enabled VSENSE OVP Enabled ISENSE Over-current Limitation Enabled Constant Power Control Enabled VSENSE > VOV or PCOMP < 0.2V or ICOMP < 0.2V
Good Counter = 2730sec (No faults detected)
VSENSE < VOV(1/7.5)
Reset Fault and Good Counters
Reset Good Counter
VSENSE < VOV(2/5) and PCOMP > 0.2V and ICOMP > 0.5V
BUCK OFF Mode
Buck Off Full-Bridge Oscillating Fault Counters Enabled
All values are typical. Applies to application circuit on page 1.
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Application Information and Additional Details
Information regarding the following topics is included as subsections within this section of the datasheet. * * * * * * * * * * * * * * * IGBT/MOSFET Gate Drive Undervoltage Lockout Protection General Mode Ignition Timer Full-Bridge Control Buck Control Constant Power Control Current Limitation Control Over Voltage Fault Counter Under Voltage Fault Counter Fast Transient Under-Voltage Fault Counter Good Counter Fault Reset PCB Layout Tips Additional Documentation
IGBT/MOSFET Gate Drive The IRS2573D HVICs are designed to drive up to six MOSFET or IGBT power devices. Figures 1 and 2 illustrate several parameters associated with the gate drive functionality of the HVIC. The output current of the HVIC, used to drive the gate of the power switch, is defined as IO. The voltage that drives the gate of the external power switch is defined as VHO for the high-side power switch and VLO for the low-side power switch; this parameter is sometimes generically called VOUT and in this case does not differentiate between the high-side or low-side output voltage.
VB (or VCC)
VB (or VCC)
IO+
HO (or LO) + HO (or LO)
VHO (or VLO)
VS (or COM) VS (or COM)
IO-
Figure 1: HVIC sourcing current
Figure 2: HVIC sinking current
Undervoltage Lock-Out The under-voltage lockout mode (UVLO) is defined as the state the IC is in when VCC is below the turn-on threshold of the IC. The IC is designed to maintain an ultra-low supply current during UVLO mode of 150uA for reducing power losses across the external start-up resistor, and, to guarantee the IC is fully functional before the buck high-side and full-bridge high and low-side output drivers are activated. The external capacitor from VCC to COM is charged by a current flowing from the rectified AC line or DC bus through an external supply resistor minus the micro-power start-up current drawn by the IC. The external start-up resistor is chosen so that VCC exceeds the IC turn-on threshold at the desired AC line turn-on voltage for the ballast. Once the capacitor voltage
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IRS2573D
on VCC reaches the start-up threshold (UVLO+), and, the voltage on RST pin is less than 1.5V, the IC turns on and the full-bridge oscillator (CT) and gate driver outputs (HO1, LO1, HO2 and LO2) begin to oscillate. The capacitor from VCC to COM begins to discharge due to the increase in IC operating current. An auxiliary supply (secondary winding, charge pump, etc.) should then take over as the main supply voltage before VCC discharges to the IC turn-off threshold (Figure 3) and charge VCC up to the internal zener clamp diode voltage (15.6V typical). During UVLO mode, the full-bridge and buck are off, the ignition timer and clock are off, the fault and good counters are reset, and the fault latch is reset.
VCC
IC 'OFF' CVCC DISCHARGE VUVLO+
VHYST
IC 'ON'
INTERNAL VCC ZENER CLAMP VOLTAGE
VUVLODISCHARGE TIME
AUXILIARY SUPPLY OUTPUT RSUPPLY & CVCC TIME CONSTANT
t
Figure 3, IC supply voltage during turn-on General Mode During General Mode, the IC reacts to the different load conditions (open-circuit, short-circuit, lamp warm-up, constant power running, under-voltage lamp faults, transient under-voltage lamp faults, over-voltage lamp faults, lamp non-strike, etc.) by turning the buck circuit on or off, adjusting the buck circuit on-time, or counting the occurrence of the different fault conditions and turning the complete IC off. The IC senses the different load conditions at the VSENSE and ISENSE pins, compares the voltages at these pins against the programmed thresholds at the OV and OC pins, and determines the correct operating mode of the IC (see State Diagram). Ignition Timer The ignition timer is enabled when the IC first enters IGN Mode. The ignition timer frequency is programmed with the external capacitor at the TIGN pin. CTIGN charges up and down linearly through internal sink and source currents between a fixed voltage window of 2V and 4V (Figure 4). This sets up an internal clock (666ms typical) that is divided out 128 times and then used to turn the ignition gate driver output (IGN pin) on and off for a given on and off-time (21sec `high'/64sec `low' typical). A logic `high' at the IGN pin will turn the external ignition MOSFET on and enable the external sidac-controlled pulse ignition circuit (see Figure 5, and Typical Application Diagram). The ignition circuit will continuously try to ignite the HID lamp for 21sec `on' and 64sec `off' until the lamp ignites. If the lamp does not ignite after 787sec then the IC will enter Fault Mode and latch off. If the lamp ignites successfully, the voltage at the VSENSE pin will fall below VOV(2/5) due to the low impedance of the lamp and the ignition timer will be disabled (logic `low' at the IGN pin).
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666ms typ. 4V
TIGN
2V
IGN
VLAMP
0V
IGN ENABLED (21s typ.)
IGN DISABLED (64s typ.) 787sec typ.
IGN ENABLED (21s typ.)
FAULT MODE
Figure 4, Ignition timer timing diagram
VGATE:MIGN VCBUCK VCIGN
VDIAC
t VLAMP 4KV
t
Figure 5, Ignition circuit timing diagram.
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Full-Bridge Control The IC includes a complete high and low-side full-bridge driver necessary for driving the HID lamp with an AC square-wave voltage. The full-bridge begins oscillating at the programmed frequency immediately when the IC comes out of UVLO Mode and turns on. The full-bridge is typically driven at a low frequency to prevent acoustic resonances from damaging the lamp. The full-bridge frequency is programmed with the external capacitor at the CT pin. CT charges up and down linearly through internal sink and source currents between a fixed voltage window of 2V and 4V. CT reaching 4V initiates the toggling of LO1/HO1, and LO2/HO2 respectively (see Figure 6). The dead-time is fixed internally at 1.0us typical. During the dead-time, all full-bridge MOSFETs are off and the mid-points of each half-bridge are floating or unbiased. Should an external transient occur during the dead-time due to an ignition voltage pulse, each half-bridge mid-point (VS1 and VS2 pins) can slew high or low very quickly and exceed the dv/dt rating of the IC. To prevent this, internal logic guarantees that the IGN pin is set to a logic `low' during the dead-time. No ignition pulses can occur until the dead-time has ended and the appropriate fullbridge MOSFETs are turned on. This will guarantee that the mid-points are biased to the output voltage of the buck or COM before an ignition pulse occurs. The full-bridge stops oscillating only when the IC enters Fault Mode or UVLO Mode.
4V
CT
2V
LO1, HO2
LO2, HO1
Dead-time Dead-time
VS1
VS2
VLAMP
0V
Figure 6, Full-bridge Timing Diagram Buck Control The buck control circuit operates in critical-conduction mode or continuous-conduction mode depending on the off-time of the buck output or the peak current flowing through the buck MOSFET. During normal lamp running conditions, the voltage across the buck current sensing resistor, as measured by the CS pin, is below the internal over-current threshold (1.2V typical). The buck on-time is defined by the time it takes for the internal on-time capacitor to charge up to the voltage level on the PCOMP pin or ICOMP pin, whichever is lower. During the onwww.irf.com (c) 2009 International Rectifier
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time, the current in the buck inductor charges up to a peak level, depending on the inductance value, and the secondary winding output of the buck inductor is at some negative voltage level, depending on the ratio between the primary and secondary windings. The secondary winding output is measured by the ZX pin, which clamps the negative voltage to a diode drop below COM using the internal ESD diode, and limits the resulting negative current flowing out of the pin with an external resistor, RZX. When the voltage on the internal on-time capacitor exceeds the voltage on the PCOMP pin or ICOMP pin, the on-time has ended and the buck output turns off. The secondary winding output of the buck inductor transitions to some positive voltage level, depending on the ratio between the primary and secondary windings, and causes the ZX pin to exceed the internal 2V threshold. The current in the buck inductor begins to discharge into the lamp full-bridge output stage. When the inductor current reaches zero, the ZX pin decreases back below the 2V threshold. This causes the internal logic of the buck control to start the on-time cycle again. This mode of operation is known as critical-conduction mode because the buck MOSFET is turned on each cycle when the inductor current discharges to zero. The on-time is programmed by the voltage level on the PCOMP pin, and the off-time is determined by the time it takes for the inductor current to discharge to zero, as measured by a negative-going edge on the ZX pin (Figure 7). The resulting shape of the current in the inductor is triangular with a peak value determined by the inductance value and on-time setting. During lamp warm-up or a short-circuit condition at the output, the inductor current will charge up to an excessive level that can saturate the inductor or damage the buck MOSFET. To prevent this condition, the buck current sensing resistor is set such that the voltage at the CS pin exceeds the internal over-current threshold (1.2V typical) before the inductor saturates. Should the CS pin exceed 1.2V before the internal on-time capacitor reaches the voltage level on the PCOMP pin or ICOMP pin, the on-time will end and the buck output will turn off. The off-time is determined by a negative-going edge on the ZX pin, or, if the maximum off time is reached as programmed by the time it takes for the external capacitor on the TOFF pin to charge up to an internal threshold of 2V. If the maximum off-time is reached before the inductor current discharges to zero, then the inductor will begin charging again from some value above zero. This mode of operation is known as continuous-conduction mode and results in a continuous DC current in the inductor with a ripple bounded above by the over-current threshold and below by the maximum off time setting. Continuous-conduction mode also allows for a higher average current to flow through the buck inductor before saturation occurs than with critical-conduction mode.
VCC
UVLO+
VPCOMP
CTON BUCK
0.2V
1.2V
ILBUCK
Critical Conduction Mode Continuous Conduction Mode
ZX TOFF
2V
Figure 7, Buck circuit timing diagram
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Constant Power Control During the general mode of operation and after the lamp has ignited, the IC regulates the lamp output power to a constant level. To achieve this, the IC measures the lamp voltage and lamp current at the VSENSE and ISENSE pins, multiplies the voltage and current together using an internal multiplier circuit to calculate power, and regulates the output of the multiplier circuit to a constant reference voltage by increasing or decreasing the buck on-time. If the lamp power is too low then the output of the multiplier will be below the internal reference voltage. The operational trans-conductance amplifier (OTA) will output a sourcing current to the PCOMP pin that will charge up the external capacitor to a higher voltage. This will increase the on-time of buck and increase the output current to the lamp for increasing the output power. If the lamp power is too high, then the opposite will occur. The OTA will output a sinking current to the PCOMP pin that will discharge the external capacitor to a lower voltage. This will decrease the buck on-time and decrease the output current to the lamp for decreasing the output power. The speed of the constant power control loop is set by the value of the external capacitor at the PCOMP pin that determines how fast the loop will react and adjust the buck on-time over the changing load conditions. Current Limitation Control The constant power control loop will increase or decrease the buck current for maintaining constant power in the lamp load. During lamp warm-up, the lamp voltage can be very low (20V typical) and the constant power loop will attempt to increase the buck current to several amps of current to maintain constant power. This high current can exceed the manufacturer's maximum current rating for the HID lamp. To prevent this condition, an additional current limitation control loop has been included in the IC. Should the voltage at the ISENSE pin exceed the voltage level at the OC pin, another OTA will sink current from the ICOMP pin. When the ICOMP pin voltage decreases below the PCOMP pin voltage, then the current limitation loop will override the constant power loop and the ICOMP pin will decrease the buck on-time. The lower of the PCOMP or ICOMP pins will override the other and control the buck on-time. When the lamp eventually warms up and the lamp voltage increases to a level where the lamp current is below the maximum allowable limit (Figure 8), then the ICOMP pin voltage will increase above the PCOMP pin voltage, and the PCOMP pin will control the buck on-time again for maintaining constant power.
V, I
Lamp Warm-up
Running
VSENSE POWER ISENSE t Ignition Current Limitation Constant Power
Figure 8, VSENSE and ISENSE pins during ignition, warm-up and running modes. Over-Voltage Fault Counter The IC includes an over-voltage fault counter at the VSENSE pin. The over-voltage fault counter will count the time during which an over-voltage condition at the output of the buck exists due to an open-circuit condition, lamp extinguishes, lamp removal or end-of-life. If the voltage at the VSENSE pin remains above VOV(2/5) and the over-voltage fault counter times out (787sec typical), then the IC will enter Fault Mode and shutdown. If the voltage at the VSENSE pin decreases below VOV(2/5) before the over-voltage fault counter times out, then the
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lamp has successfully ignited and the IC will enter General Mode. The IGN pin (ignition gate driver output) will remain `high' until the ignition timer has timed out. Under-Voltage Fault Counter The IC also includes an under-voltage fault counter at the VSENSE pin. Once the lamp has ignited, the lamp voltage will decrease sharply to a very low voltage (20V typical). As the lamp warms up, the lamp voltage will slowly increase until the nominal running voltage is reached (100V typical). If the lamp voltage remains too low for too long, then this is a lamp fault condition and the ballast must shutdown. To detect this, the VSENSE pin includes an under-voltage threshold of VOV(1/7.5). If the voltage at the VSENSE pin remains below VOV(1/7.5) and the under-voltage fault counter times out (197sec typical), then the lamp is not warming up properly due to a lamp fault condition (end of life, etc.) and the IC will enter fault mode and shutdown. If the voltage at the VSENSE pin increases above VOV(1/7.5) before the under-voltage counter times out, then the lamp has successfully warmed up and the IC will remain in general mode. A fast transient under-voltage detection is also included at the VSENSE pin of the IC. Fast Transient Under-Voltage Fault Counter During normal running conditions, fast transient under-voltage spikes can occur on the lamp voltage due to instabilities in the lamp arc. The resulting transients on the VSENSE pin will cycle below and above the VOV(1/7.5) threshold quickly (<50us). If the number of events of these transients exceeds the maximum number of events of the fault counter (16384 events typical), then the IC will enter fault mode and shutdown. Good Counter If no faults are detected for a long period of time (2730sec typical), as measured by the good counter, then the fault counter and good counter will both be reset to zero. Also, each time a fault is counted, the good counter is reset to zero. Fault Reset To exit Fault Mode and return to UVLO Mode, VCC can be decreased below UVLO- and back above UVLO+, or, the RST pin can be increased above 2.5V. PCB Layout Tips Distance between high and low voltage components: It's strongly recommended to place the components tied to the floating voltage pins (VB and VS) near the respective high voltage portions of the device. Ground Plane: In order to minimize noise coupling, the ground plane should not be placed under or near the high voltage floating side. Gate Drive Loops: Current loops behave like antennas and are able to receive and transmit EM noise (see Figure 9). In order to reduce the EM coupling and improve the power switch turn on/off performance, the gate drive loops must be reduced as much as possible. Moreover, current can be injected inside the gate drive loop via the IGBT collector-to-gate parasitic capacitance. The parasitic auto-inductance of the gate loop contributes to developing a voltage across the gate-emitter, thus increasing the possibility of a self turn-on effect.
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Figure 9: Antenna Loops Supply Capacitor: It is recommended to place a bypass capacitor (CIN) between the VCC and VSS pins. A ceramic 1 F ceramic capacitor is suitable for most applications. This component should be placed as close as possible to the pins in order to reduce parasitic elements. Routing and Placement: Power stage PCB parasitic elements can contribute to large negative voltage transients as the switch node; it is recommended to limit the phase voltage negative transients. In order to avoid such conditions, it is recommended to 1) minimize the high-side emitter to low-side collector distance, and 2) minimize the low-side emitter to negative bus rail stray inductance. However, where negative VS spikes remain excessive, further steps may be taken to reduce the spike. This includes placing a resistor (5 or less) between the VS pin and the switch node (see Figure 10), and in some cases using a clamping diode between VSS and VS (see Figure 11). See DT04-4 at www.irf.com for more detailed information.
Figure 10: VS resistor
Figure 11: VS clamping diode
Additional Documentation Several technical documents related to the use of HVICs are available at www.irf.com; use the Site Search function and the document number to quickly locate them. Below is a short list of some of these documents. DT97-3: Managing Transients in Control IC Driven Power Stages AN-1123: Bootstrap Network Analysis: Focusing on the Integrated Bootstrap Functionality DT04-4: Using Monolithic High Voltage Gate Drivers AN-978: HV Floating MOS-Gate Driver ICs
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Parameter Temperature Trends
2.500 1
2.250 VISENSE (V)
0.75
VIREF (V)
2.000
0.5
1.750
0.25
1.500 -25
0
25
50
75
100
125
0 -25
0
25
50
75
100
125
Temperature C
Temperature C
Fig. 11 VIREF vs. Temperature
0.60
Fig. 12 VISENSE vs. Temperature
3.000
0.55
2.750
PSENSE
VOV (V)
0.50
2.500
0.45
2.250
0.40 -25
0
25
50
75
100
125
2.000 -25
0
25
50
75
100
125
Temperature C
Temperature C
Fig. 13 PSENSE vs. Temperature
Fig. 14 VOV vs. Temperature
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1.500
1.000
1.250
0V(1/7.5) (V)
0.750
0V(2/5) (V)
1.000
0.500
0.750
0.250
0.500 -25
0
25
50
75
100
125
0.000 -25
0
25
50
75
100
125
Temperature C
Temperature C
Fig. 15 OV(2/5) vs. Temperature
200
2.500
Fig. 16 OV(1/7.5) vs. Temperature
150 ITOFF (uA)
2.250
100
VTOFF (V)
2.000
50
1.750
0 -25
0
25
50
75
100
125
1.500 -25
0
25
50
75
100
125
Temperature C
Temperature C
Fig. 17 ITOFF vs. Temperature
Fig. 18 VTOFF vs. Temperature
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Package Details: SOIC28W
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IRS2573D
Package Details: SOIC28W, Tape and Reel
LOADED TAPE FEED DIRECTION
B
A
H
D F C
NOTE : CONTROLLING DIM ENSION IN M M
E G
CARRIER TAPE DIMENSION FOR Metric Code Min Max A 11.90 12.10 B 3.90 4.10 C 23.70 24.30 D 11.40 11.60 E 10.80 11.00 F 18.20 18.40 G 1.50 n/a H 1.50 1.60
28SOICW Imperial Min Max 0.468 0.476 0.153 0.161 0.933 0.956 0.448 0.456 0.425 0.433 0.716 0.724 0.059 n/a 0.059 0.062
F
D C E B A
G
H
REEL DIMENSIONS FOR 28SOICW Metric Imperial Code Min Max Min Max A 329.60 330.25 12.976 13.001 B 20.95 21.45 0.824 0.844 C 12.80 13.20 0.503 0.519 D 1.95 2.45 0.767 0.096 E 98.00 102.00 3.858 4.015 F n/a 30.40 n/a 1.196 G 26.50 29.10 1.04 1.145 H 24.40 26.40 0.96 1.039
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Part Marking Information
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Ordering Information
Standard Pack Base Part Number Package Type Form IRS2573D SOIC28W Tube/Bulk Tape and Reel Quantity 25 1000 IRS2573DSPBF IRS2573DSTRPBF Complete Part Number
The information provided in this document is believed to be accurate and reliable. However, International Rectifier assumes no responsibility for the consequences of the use of this information. International Rectifier assumes no responsibility for any infringement of patents or of other rights of third parties which may result from the use of this information. No license is granted by implication or otherwise under any patent or patent rights of International Rectifier. The specifications mentioned in this document are subject to change without notice. This document supersedes and replaces all information previously supplied.
For technical support, please contact IR's Technical Assistance Center http://www.irf.com/technical-info/
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
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